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日期:2018-12-01 10:03

CHANGE LOG

Date Description

Nov 10, 2018 Original creation.

PROJECT SPECIFICATIONS AND DETAILS

Delta-sigma modulators are a popular means of realizing high resolution, but moderate bandwidth,

analog-to-digital data converters. Such systems quantize a given continuous time signal to an

oversampled, but coarse (e.g., typically 1 but up to 4-5 bits) digital seqeuence. The main idea is that the

noise resulting from very coarsely quantizing the input signal is distributed over [0, Fs/2] whereas the

signal is concentrated in a much smaller bandwidth, [0,B] where OSR = (Fs/2)/B is called the

“oversamping ratio”. A digital Decimation Filter subsequently filters out most of this quantization noise

and down-samples the result to achieve a very high resolution digital sample representation of the

signal, as shown in Fig. 1.

Goal: Design and implement (in MATLAB) a decimation filter that meets the specifications given below

while minimizing the hardware and energy requirements. In other words, you have to design the filter,

choose the architecture, and the bit-widths of a fixed-point implementation.

Specifications:

Parameter Value

Input sample rate, F1 1024 kHz

Output sample rate, F2 8 kHz

Oversampling ratio (OSR) 128

Pass-band edge 2 kHz

Stop-band edge 3 kHz

Minimum stop-band attenuation 60 dB

Maximum pass-band ripple 1 dB

Pass-band phase Linear

Minimum output SNR (for -6dB full-scale signal) 90 dB

OSR

π

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LPF

Procedure and other notes:

1. Estimate the hardware and energy consumption in terms of the number of “basic” logic gates

required according to the following approximate table:

Arithmetic Block Number of Logic Gates

n-bit Adder 4n

n-bit Multiplier 2n

2

n-bit Register 5n

Furthermore, assume that each “basic” logic gate running at F2, consumes a power P. To run at a

higher rate, F, assume that it consumes a power (F/F2)*P i.e. power increases linearly with

operating frequency.

2. You are free to choose a digital filtering method of your choice. However, you have to guarantee

that the phase is linear over the pass-band. The simplest (conceptually) methods involve

FIR/IIR/hybrid filtering followed by down-sampling. More sophisticated method involve

decimating gradually from F1 to F2 via some intermediate frequencies, using what are called

“Cascaded Integrator Comb” or “CIC” filters. Here is a key reference (many others can be readily

found by a proper search).

a. E. B. Hogenauer, “An economical class of digital filters for decimation and

interpolation,” IEEE Transactions on Acoustics, Speech and Signal Processing,

ASSP29(2):155–162, 1981.

3. For grading, preference will be given to a complete working system (that meets all

specifications) a system that promises hardware reductions but is not deomnstrated to meet all

specifications.

SUBMISSION DETAILS:

1. Please submit MATLAB code that will design your filter and plot all relevant results e.g.,

frequency response plots, pole-zero plot, impulse response etc., all with and without

quantization effects. I will run your MATLAB code to evaluate it. If it doesn’t run, you will get no

credit. Do not forget proper labeling of your plots.

2. Please submit a two page report summarizing the design approach, rationale behind your design

choices and a table of performance numbers. Show quantitative arguments in favor of your

choices.

3. The deadline for the project submission is Friday, Dec 14 2018, 5pm PST i.e. the last business

day of the finals week.


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